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Low Voltage TVS Diode Array For ESD & Latch-Up Protection
PROTECTION PRODUCTS Description
The SLV series of transient voltage suppressors are designed to protect low voltage semiconductor components which are connected to data and transmission lines from transients caused by electrostatic discharge (ESD), lightning and other induced voltage surges. The devices are constructed using Semtechs proprietary EPD process technology. The EPD process provides low standoff voltages with significant reductions in leakage currents and capacitance over silicon avalanche diode processes. The SLV series is specifically designed for protecting low voltage components such as microprocessors, ASICs, I/O transceivers, and high speed RAM. They provide ESD and latch-up protection for power and I/O ports, microprocessor bus interfaces, high speed data and video transmission lines, and low power portable and wireless systems. The SLV series TVS diodes will meet the surge requirements of IEC 61000-4-2, Level 4, Human Body Model for air and contact discharge. The low clamping voltage of the SLV minimizes the stress on the protected transceiver. The SO-8 package allows flexibility in the design of crowded circuit boards.
SLVDA2.8
Features
u 300 watts peak pulse power (tp = 8/20s) u Transient protection for data lines to
IEC 61000-4-2 (ESD) 15kV (air), 8kV (contact) IEC 61000-4-4 (EFT) 40A (5/50ns) IEC 61000-4-5 (Lightning) 12A (1.2/50s) Protects up to four bidirectional lines Working Voltages: 2.8V & 3.3V Low leakage current for low power applications Low operating voltage ideal for latch-up protection Low capacitance Low clamping voltage Solid-state EPD TVS technology JEDEC SO-8 package Molding compound flammability rating: UL 94V-0 Marking : Part number, date code, logo Packaging : Tape and Reel per EIA 481
u u u u u u u u u u u u u u u u u
Mechanical Characteristics
Applications
ESD and Latch-Up Protection Analog Inputs WAN/LAN Equipment Low Voltage ASICs Instrumentation Low Power Systems
Circuit Diagram (Each Line)
Schematic & PIN Configuration
1
8
2
7
3
6
4
5
S0-8 (Top View)
Revision 9/2000 1 www.semtech.com
SLVDA2.8
PROTECTION PRODUCTS Absolute Maximum Rating
R ating Peak Pulse Pow er (tp = 8/20 s) Peak Pulse Current (tp = 8/20 s) Lead Sold ering Temp erature Op erating Temp erature Storage Temp erature Symbo l Pp k I PP TL TJ TSTG Value 300 24 260 (10 sec.) -55 to +125 -55 to +150 Units Watts A C C C
Electrical Characteristics
SLVDA2.8 Par ame te r Reverse Stand -Off Voltage Punch -Th rough Voltage Snap -Back Voltage Reverse Leakage Current Clamp ing Voltage Clamp ing Voltage Maximum Peak Pulse Current Junction Cap acitance Symbo l V RWM V PT V SB IR VC VC I PP Cj IPT = 2 A ISB = 50mA V RWM = 2.8V, T=25C IPP = 1A , tp = 8/20 s IPP = 5A , tp = 8/20 s tp = 8/20 s Betw een I/O Pins and Gnd V R = 0V, f = 1MHz 3.0 2.8 1 4.1 5.3 24 100 Co nd itio ns Minimum Typ ical Maximum 2.8 Units V V V A V V A pF
a 2000 Semtech Corp.
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SLVDA2.8
PROTECTION PRODUCTS Typical Characteristics
Non-Repetitive Peak Pulse Power vs. Pulse Time
10
Power Derating Curve
110 100
Peak Pulse Power - P PP (kW)
90 % of Rated Power or I PP 80 70 60 50 40 30 20 10
0.01 0.1 1 10 Pulse Duration - tp (s) 100 1000 1
0.1
0 0 25 50 75 100 125 150 Ambient Temperature - TA (oC)
Pulse Waveform
110 100 90 80 Percent of IPP 70 60 50 40 30 20 10 0 0 5 10 15 Time (s) 20 25 30 td = IPP/2 e
-t
Waveform Parameters: tr = 8s td = 20s
ESD Pulse Waveform (IEC 61000-4-2)
Level
IEC 61000-4-2 Discharge Parameters
First Peak Current (A) 1 2 3 4 7.5 15 22.5 30 Peak Current at 30 ns (A) 4 8 12 16 Peak Current at 60 ns (A) 8 4 6 8 Test Test Voltage Voltage (Contact ( A ir Disch arge) Disch arge) (kV ) (kV ) 2 4 6 8 2 4 8 15
a 2000 Semtech Corp.
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SLVDA2.8
PROTECTION PRODUCTS Applications Information
Device Connection for Protection of Four Data Lines The SLVDA series devices are designed to protect up to four data lines. The devices are connected as follows:
l
LINE 1 LINE 2 LINE 3 LINE 4
I/O Line Protection
l
Common mode protection of four data lines is achieved by connecting data lines at pins 1 - 4. Pins 5 - 8 are connected to ground (Device is symmetrical so connections may be reversed to serve a specific application). The ground connections should be made directly to the ground plane for best results. The path length is kept as short as possible to reduce the effects of parasitic inductance in the board traces. Protecting 5V lines: The designer may take advantage of the superior reverse leakage and capacitance characteristics of the SLVDA2.8 to protect two 5V lines. This is achieved by connecting two lines of the device in series as shown. The series connection is made by shorting pins 5 & 6 together for the first line and pins 7 & 8 for the second line. Pins 1 & 4 are connected to the lines that are to be protected. Pins 2 & 3 are connected to ground. See application note SI96-14 for additional details.
Typical Connection
To Protected Device
1 8
Circuit Board Layout Recommendations for Suppression of ESD. Good circuit board layout is critical for the suppression of ESD induced transients. The following guidelines are recommended:
l l l l l l
2
7
Ground
3 6
4
5
Place the TVS near the input terminals or connectors to restrict transient coupling. Minimize the path length between the TVS and the protected line. Minimize all conductive loops including power and ground loops. The ESD transient return path to ground should be kept as short as possible. Never run critical signals near board edges. Use ground planes whenever possible.
From Connector
Optional Connection for Protecting 5V Lines
a 2000 Semtech Corp.
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SLVDA2.8
PROTECTION PRODUCTS Outline Drawing - SO-8
Land Pattern SOT 143 Land Pattern - SO-8
a 2000 Semtech Corp.
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SLVDA2.8
PROTECTION PRODUCTS Ordering Information
Par t Numbe r SLV DA 2.8.TC Wo r king Vo ltage 2.8V Qty p e r R e e l 500 R e e l Size 7 Inch
Note: Consult factory for availability of 13 reels
Contact Information
Semtech Corporation Protection Products Division 652 Mitchell Rd., Newbury Park, CA 91320 Phone: (805)498-2111 FAX (805)498-3804
a 2000 Semtech Corp. 6 www.semtech.com

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